A) ![]()
B) ![]()
C) ![]()
D) ![]()
Correct Answer
verified
True/False
Correct Answer
verified
Multiple Choice
A) Asynchronous events are controlled by a clock.
B) Synchronous events do not need a clock to control them.
C) Only asynchronous events need a control clock.
D) Asynchronous events occur independently of the circuit clock.
Correct Answer
verified
Multiple Choice
A) sequential truth table
B) present state table
C) state diagram
D) next- state table
Correct Answer
verified
True/False
Correct Answer
verified
Multiple Choice
A) 7
B) 0110
C) 4
D) 11
Correct Answer
verified
True/False
Correct Answer
verified
True/False
Correct Answer
verified
Multiple Choice
A) 0.005
B) 5000
C) 19
D) 200
Correct Answer
verified
Multiple Choice
A) 1
B) 0
Correct Answer
verified
True/False
Correct Answer
verified
True/False
Correct Answer
verified
True/False
Correct Answer
verified
Multiple Choice
A) E912
B) 63C0
C) 16ED
D) E3C0
Correct Answer
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Multiple Choice
A) 50 kHz
B) 0 Hz
C) 500 kHz
D) 5 kHz
Correct Answer
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Multiple Choice
A) The counter is defective; there is probably a bad connection on the CTEN terminal of CTR0.
B) The counter is defective; an open exists somewhere between TC of CTR0 and CTEN of CTR1.
C) The counter is working correctly.
D) The counter is not working correctly; the TC of CTR1 is probably shorted to ground.
Correct Answer
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Multiple Choice
A) Both the ENP and ENT terminals must be HIGH in order for the counter to cycle on the leading edge of the CLK input.
B) Both the active- LOW CLR and LOAD inputs must be LOW in order for the counter to cycle.
C) When the CLK input goes HIGH, the data on the DATA INPUT terminals is passed through to the DATA OUTPUT terminals.
D) The active- HIGH ENT and ENP inputs must be HIGH, while the active- LOW CLR and LOAD inputs must be LOW in order for the counter to cycle.
Correct Answer
verified
Multiple Choice
A) The Q0 output should be connected to the J input of FFl.
B) The input of FF1 may be shorted to ground.
C) The output of FF0 may be shorted to ground.
D) The problem could be caused by either B or C.
Correct Answer
verified
Multiple Choice
A) 111
B) 3
C) 5
D) 4
Correct Answer
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Multiple Choice
A) Moore
B) State machines do not have clock inputs.
C) Mealy
D) Moore and Mealy
Correct Answer
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