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The function of switching applications and data resources over from a failed system to an alternative system in the cluster is referred to as failback.

A) True
B) False

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The term SMP refers to a computer hardware architecture and also to the operating system behavior that reflects that architecture.

A) True
B) False

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Snoopy protocols are not suitable for a bus-based multiprocessor.

A) True
B) False

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Computer systems that fall into the ________ category have a set of processors that simultaneously execute different instruction sequences on different data sets.

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MIMD (mult...

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The four principal approaches to multithreading are: interleaved (fine-grained),blocked (coarse-grained),simultaneous,and ________.

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chip multi...

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With a write-update protocol there can be multiple readers but only one writer at a time.

A) True
B) False

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Replicating the entire processor on a single chip with each processor handling separate threads is _________.


A) interleaved multithreading
B) blocked multithreading
C) simultaneous multithreading
D) chip multiprocessing

E) A) and C)
F) None of the above

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A _________ problem arises when multiple copies of the same data can exist in different caches simultaneously,and if processors are allowed to update their own copies freely,an inconsistent view of memory can result.


A) cache coherence
B) cluster
C) failover
D) failback

E) A) and C)
F) A) and B)

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The most important measure of performance for a processor is the rate at which it executes instructions.

A) True
B) False

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Computer systems that fall into the __________ category have a single processor that executes a single instruction stream to operate on data stored in a single memory.

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SISD (sing...

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________ provides service to customers in the form of software,specifically application software,running on and accessible in the cloud.


A) PaaS
B) CaaS
C) SaaS
D) IaaS

E) A) and D)
F) A) and C)

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A taxonomy first introduced by _______ is still the most common way of categorizing systems with parallel processing capability.


A) Randolph
B) Flynn
C) von Neuman
D) Desai

E) None of the above
F) A) and D)

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The objective with NUMA is to maintain a transparent system wide memory while permitting multiple multiprocessor nodes, each with its own bus or other internal interconnect system.

A) True
B) False

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True

Vector and array processors fall into the ________ category of computer systems.


A) SIMD
B) SISD
C) MISD
D) MIMD

E) A) and B)
F) A) and C)

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Hardware-based solutions are generally referred to as cache coherence _______.


A) clusters
B) streams
C) protocols
D) vectors

E) None of the above
F) A) and D)

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A ________ is a dispatchable unit of work within a process that includes a processor context and its own data area for a stack.


A) process
B) process switch
C) thread
D) thread switch

E) B) and D)
F) B) and C)

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SMPs,clusters,and NUMA systems fit into the ________ category of computer systems.


A) SISD
B) MIMD
C) SIMD
D) MISD

E) C) and D)
F) All of the above

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An L1 cache that does not connect directly to the bus cannot engage in a snoopy protocol.

A) True
B) False

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True

Software cache coherence schemes attempt to avoid the need for additional hardware circuitry and logic by relying on the compiler and operating system to deal with the problem.

A) True
B) False

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True

With no multithreading,_________ is the simple pipeline found in traditional RISC and CISC machines.


A) superscalar
B) single-threaded scalar
C) blocked multithreaded scalar
D) interleaved multithreaded scalar

E) A) and B)
F) A) and C)

Correct Answer

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